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CS5467
7.6.5 Register Read and Write
B7
0
B6
W/R
B5
RA4
B4
RA3
B3
RA2
B2
RA1
B1
RA0
B0
0
Read and Write commands provide access to on-chip registers. After a Read command, the addressed data
can be clocked out the SDO pin by SCLK. After a Write command, 24 bits of write data must follow. The data
is transferred to the addressed register after the 24 th data bit is received. Registers are organized into pages
of 32 addresses each. To access a desired page, write its number to the Page register at address 31.
W/R
RA[4:0]
Write/Read control
0 = Read
1 = Write
Register address.
Page 0 Registers
Address
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 R
31 W
RA[4:0]
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
11111
Name
Config
I1
V1
P1
P1 AVG
I1 RMS
V1 RMS
I2
V2
P2
P2 AVG
I2 RMS
V2 RMS
Q1 AVG
Q1
Status
Q2 AVG
Q2
I1 PEAK
V1 PEAK
S1
PF1
I2 PEAK
V2 PEAK
S2
PF2
Mask
T
Ctrl
E PULSE
S PULSE
Q PULSE
Page
Description
Configuration
Instantaneous Current Channel 1
Instantaneous Voltage Channel 1
Instantaneous Power Channel 1
Active Power Channel 1
RMS Current Channel 1
RMS Voltage Channel 1
Instantaneous Current Channel 2
Instantaneous Voltage Channel 2
Instantaneous Power Channel 2
Active Power Channel 2
RMS Current Channel 2
RMS Voltage Channel 2
Reactive Power Channel 1
Instantaneous Quadrature Power Channel 1
Internal Status
Reactive Power Channel 2
Instantaneous Quadrature Power Channel 2
Peak Current Channel 1
Peak Voltage Channel 1
Apparent Power Channel 1
Power Factor Channel 1
Peak Current Channel 2
Peak Voltage Channel 2
Apparent Power Channel 2
Power Factor Channel 2
Interrupt Mask
Temperature
Control
Active Energy Pulse Output
Apparent Energy Pulse Output
Reactive Energy Pulse Output
Register Page Select
Warning: Do not write to unpublished register locations.
DS714F3
27
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